FPGA Design of Real Time Hardware for Face Detection
نویسندگان
چکیده
This paper proposes the hardware architecture of face detection FPGA system using AdaBoost algorithm. The proposed structure is possible to work in 30 frames per second and real time. And algorithm adopted learn generate characteristics data by MATLAB, finally detected this data. describes composed image scaler, integral extraction, comparing, memory interface, grouper result display. circuit so designed process one point cycle that design can full HD (1920x1080) at 70MHz, which approximate 2316087 x cycle.
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ژورنال
عنوان ژورنال: International journal of electrical & electronics research
سال: 2022
ISSN: ['2347-470X']
DOI: https://doi.org/10.37391/ijeer.100226